PantheonSim / GPUs / NVIDIA Rubin

Simulated NVIDIA Rubin: a GPU profile for CUDA and ROCm testing

PantheonSim, the GPU simulator for CUDA and ROCm, simulates the NVIDIA Rubin (Rubin, 10.7) as the profile nvidia/vr200. A Rubin-generation data-center GPU. The profile is built from public documents, and its PCI id is a placeholder. Its profile is built from public documents and not yet measured against a physical card.

The profile at a glance

These are the numbers a program can ask this simulated GPU, and the values nvidia-smi show for it. They come from the profile file in the simulator's repository, pinned to one commit of it.

Property	Value
Profile id	`nvidia/vr200`
Vendor and architecture	NVIDIA, Rubin
Compute capability	`10.7`
Device memory	288.0 GiB, HBM
Streaming multiprocessors	224
Warp size	32
Max threads per multiprocessor	2048
Shared memory per block (opt-in maximum)	327 KiB
Memory bus width	16384-bit
Power limit (profile)	1100 W
Maximum clocks (profile)	1965 MHz shader, 4000 MHz memory
ECC memory	yes
PCIe link reported	Gen6 x16
Tensor or matrix cores	yes
Verified (measured on a physical card)	not yet measured

What this GPU is for

A Rubin-generation data-center GPU. The profile is built from public documents, and its PCI id is a placeholder.

Rubin is the generation after Blackwell. NVIDIA has published no PCI device id for it, so the profile carries a placeholder, and the profile is built from public documents only.

Among the 37 NVIDIA profiles it ranks 1st by device memory (288.0 GiB) and 1st by SMs (224), counting the largest as first.

Is this profile verified?

No. This profile is marked not verified: it is built from public documents only, and nothing in it was measured on a physical card. Some figures are derived or copied from the nearest profile where the vendor publishes none, so treat them as approximate, and memory sizes as upper bounds. The profile file itself calls some of its values placeholders. Programs still run on it, and it still answers every call as the architecture's rules require, but a value such as a clock or a limit may differ from a real card's.

Simulate this GPU

Build the simulator (see the docs) or open the playground, then:

nvcc -cudart shared -arch=compute_75 my_app.cu -o my_app
vgpu run --gpu nvidia/vr200 ./my_app
vgpu shell -y --gpu nvidia/vr200 --count 4
vgpu info --gpu nvidia/vr200

This profile is compute capability 10.7. A kernel built for compute_75 runs on it and on every other NVIDIA profile; a kernel built for a newer architecture is refused by a profile that is older than it. Blackwell targets need CUDA 12.8 or newer. Link the CUDA runtime shared (-cudart shared) so the simulator can stand in for it.

To use it every time, put gpu: nvidia/vr200 in a pantheonsim.yaml settings file, or in a GitHub Actions job give the PantheonSim action gpu: nvidia/vr200 (see CUDA and HIP tests in GitHub Actions). The simulator checks behaviour and has no timing model, so a run on a physical GPU before a release still counts. The CUDA guide explains the rest.

Where the numbers come from

Each profile file begins with a note on its sources. This is the note for NVIDIA Rubin, as written in the file:

Source note for nvidia/vr200

Public values; verified: false, nothing here has been measured on a card. The PCI device id below (0x7F10) is a PLACEHOLDER, not NVIDIA's. NVIDIA has not published a Rubin id: NVIDIA's open GPU kernel modules name table (g_nv_name_released.h) has no Rubin entry. 0x7F10 is in no entry of that table, so it collides with no NVIDIA part, and is below 0x8000 because CUDA reports (device << 16 | vendor) as a signed int. Replace it when NVIDIA publishes one, as the MI300X and MI350X placeholders are. Rechecked 2026-10-09 against main (ca2d03e, 2026-10-07): still no Rubin entry in the name table. The driver source does name Rubin dies (GR100, GR102) and publishes two RANGES of self-hosted Rubin device ids (detect-self-hosted.h: 0x3040-0x307f for GR100, 0x30c0-0x30ff for GR102), but no id for a named product, so no single value can be taken from it. 0x7F10 is in neither range. Where each value comes from: - compute capability 10.7: NVIDIA's CUDA 13.4 release notes, cuBLAS, "Added support for the NVIDIA Rubin (compute capability 10.7) GPU architecture". - SMs 224, 896 Tensor Cores, up to 288 GB HBM4, up to 22 TB/s, NVLink 6 at 3,600 GB/s, PCIe Gen 6 x16: NVIDIA's developer blog "Inside NVIDIA Rubin GPU Architecture". vram_bytes is 288 GiB (NVIDIA's "GB" for HBM is binary, see nvidia/gb200.yaml), an upper bound. - Per-SM shared memory: the CUDA C++ Programming Guide's compute capability table has a 10.7 column: 328 KB an SM and 327 KB a block, the 328 KB mode opted in with cudaSharedMemoryModeAllowOversizedSharedMemory (the default block limit stays 48 KB), and 64K 32-bit registers an SM, 255 a thread. - COPIED from nvidia/b300 (sm_103) because NVIDIA has not published them for Rubin: resident threads (2048) and blocks (32) an SM; the 1100 W power limit (NVIDIA gives no Rubin TDP; the blog has only rack-level power); the clocks (the blog gives none); ECC on, as every HBM part here. - Not recorded: the L2 size (the blog says only "a large centralized L2"), the NVLink link count (3,600 GB/s is stated, the link speed is not), a temperature limit. - The architecture is "rubin": no NVML architecture or PMC_BOOT_0 id is known for it, so those report unknown / none rather than Blackwell's. - CUDA attributes (the `cuda:` section): the 16384-bit bus is derived from "HBM4 doubles interface width"; the L2 is unpublished and left unset.

The GPU index lists every profile, and this one is not yet measured.

Other NVIDIA profiles: